The Xilinx LogiCORE IP Video In to AXI4-Stream core is designed to interface from a video source (clocked parallel video data with synchronization signals - active video with either syncs, blanks or both) to the AXI4-Stream Video Protocol Interface. This core works with the timing detector portion of the Xilinx Video Timing Controller (VTC) core. This core provides a bridge between a video input and video processing cores with AXI4-Stream Video Protocol interfaces. The interlace content is supported by field_id signal.