Simulating IP - 2024.1 English

Vivado Design Suite User Guide: Designing with IP (UG896)

Document ID
UG896
Release Date
2024-06-20
Version
2024.1 English

Using simulation is an important and necessary step in the design flow to verify the functionality and performance of the design. When IP output products are generated, several simulation models are created that you can include in the simulation of the overall design.

The simulation model delivered for the IP can be any of the following:

  • Custom behavioral simulation model.
  • Plain text or encrypted synthesizable RTL sources used for simulation.
  • Structural simulation model.
  • C simulation model.
    Note: Some IP (for example, the FIR Compiler IP) deliver IP-level test benches that you can directly use to simulate the IP. See Using a Test Bench for IP for more information.
    Tip: Third-party simulators that are typically used for simulating AMD devices are integrated as options in the AMD Vivado™ Integrated Design Environment (IDE). See the Vivado Design Suite User Guide: Logic Simulation (UG900) for more information on working with third-party simulators. The files are located in the ip_user_files directory.