IP Facts - 2.5 English

HBM/DDR4 Binary CAM Search v2.5 LogiCORE IP Product Guide (PG336)
Document ID
PG336
Release Date
2023-05-16
Version
2.5 English
AMD LogiCORE™ IP Facts Table
Core Specifics
Supported Device Family 1 AMD UltraScale+™ HBM
Supported User Interfaces AXI4-Lite, AXI4-Stream, and AXI3-Full Interfaces.
Resources See Performance.
Provided with Core
Design Files Encrypted Verilog RTL
Example Design Verilog
Test Bench Verilog
Constraints File AMD Design Constraint (XDC)
Simulation Model Verilog source code
Supported S/W Driver 2 Vitis Networking P4
Tested Design Flows 3
Design Entry Vitis Networking P4
Simulation 4 For supported simulators, see the Vivado Design Suite User Guide: Release Notes, Installation, and Licensing (UG973).
Synthesis Vivado Synthesis
Support
Provided by AMD at the Support web page
  1. For a complete list of supported devices, see the AMD Vivado™ IP catalog.
  2. Standalone driver details can be found Vivado Design Suite User Guide: Release Notes, Installation, and Licensing (UG973).
  3. For the supported versions of the tools, see the UG973.
  4. Modelsim, Questa, VCS, Xcelium, and Xsim are supported. Refer to Vivado Design Suite User Guide: Release Notes, Installation, and Licensing (UG973) for information on version compatibility.