All memories in the CAM database are ECC protected. There are eight additional ECC bits for every address in a 64-bit wide memory. The eight additional bits are only used for ECC and can not be used for storage. 64-bit wide memories are always referred in this document (even though 72 bits are used).
A scrubbing mechanism starts regularly (1 ms interval. For RAM_FREQ <100
MHz, the ECC scrubbing period can be longer than 1 ms.) and reads every memory address
of the CAM in the background using idle cycles. If a single-bit error is detected during
scrubbing, the error is corrected permanently by writing the corrected data back to the
memory. Single-bit errors detected during lookup operations are corrected dynamically.
If a double-bit error is detected during lookup, there will be no match. In general, if
double-bit errors are detected during lookups it is recommended to drop the packet
issuing the lookup. There are two statistic counters for ECC:
- Single-bit errors
- This counter increments for errors detected and corrected during scrubbing.
- Double-bit errors
- This counter increments for double-bit errors detected during scrubbing.
The software API provides a debug function to enable insertion of single-bit/double-bit errors during write operations. With the error insertion enabled subsequent insert/update/delete operations will store data in memory with errors.
Note: It takes up to 1 ms (or longer for
RAM_FREQ <100 MHz) before the ECC scrubber detects the errors which can be observed
on the status outputs/error counters.
The following ECC status is provided for lookup operations:
- Single-bit errors
- Not status per lookup operation, only indicated by ECC scrubber.
- Double-bit errors
- Indicated in the lookup response status flag, together with hit/miss indication.
Figure 1. ECC Timing
