Address Posting Control and Status Interface - 5.1 English

AXI DataMover LogiCORE IP Product Guide (PG022)

Document ID
PG022
Release Date
2022-04-26
Version
5.1 English

The AXI Data Mover provides additional Address Posting Control and its Status signals that allows you to exercise control over initiating transactions on the memory map side even when corresponding commands already were issued on the command interface. These signals can be controlled by user logic to minimize the need for the AXI DataMover to throttle the AXI4 Interface. All the output, signals can be left unconnected if not used in the design. All the input signals must be connected to active signals for proper operation of the core. Refer to Table: I/O Signal Description for more details.

These ports are:

mm2s_allow_addr_req (input to DataMover)

mm2s_addr_req_posted (output from DataMover)

mm2s_rd_xfer_cmplt (output from DataMover)

s2mm_allow_addr_req (input to DataMover))

s2mm_addr_req_posted (output from DataMover)

s2mm_wr_xfer_cmplt (output from DataMover)

s2mm_ld_nxt_len (output from DataMover)

s2mm_wr_len (output from DataMover)

Note: These signals are irrelevant for most of the use cases and are classified for advance use. By default the access to these signals is disabled. You can gain access to these signals by enabling them in the customization Vivado IDE.