AMD Answer 73139
If a program executing on a processor writes to a non-cacheable memory location that subsequently executes an instruction from, it must issue DSB and ISB to ensure that the updated instruction is executed. Because of this errata, this sequence might not be sufficient to prevent the processor executing the old instruction or a corrupted instruction.
This is a third-party errata (Arm, Inc. 853474); this issue will not be fixed.