FLR Interface - 3.3 English

Versal Adaptive SoC CPM DMA and Bridge Mode for PCI Express Product Guide (PG347)

Document ID
PG347
Release Date
2023-05-16
Version
3.3 English
Table 1. FLR Port Descriptions
Port Names I/O Description
dma0_usr_flr_fnc [7:0] O

Function

The function number of the FLR status change.

dma0_usr_flr_set O

Set

Asserted for 1 cycle indicating that the FLR status of the function indicated on dma0_usr_flr_fnc[7:0] is active.

dma0_usr_flr_clr O

Clear

Asserted for 1 cycle indicating that the FLR status of the function indicated on dma0_usr_flr_fnc[7:0] is completed.

dma0_usr_flr_done_fnc [7:0] I

Done Function

The function for which FLR has been completed.

dma0_usr_flr_done_vld I

Done Valid

Assert for one cycle to signal that FLR for the function on dma0_usr_flr_done_fnc[7:0] has been completed.