Processor Subsystem Configuration - 2023.1 English

Versal Adaptive SoC System Software Developers Guide (UG1304)

Document ID
UG1304
Release Date
2023-05-16
Version
2023.1 English

The APU and RPU come under the processor-based subsystems. For all processor-based subsystems, ELF files and/or CDOs are present as a part of the image. Processor details are read from image headers and the processor is initialized using XilPM commands.

The configuration consists of the following files.

Table 1. Processor Subsystem Configuration
File Contents
PSM/RPU/APU CDO files
  • (Optional) Set of PM commands with nodes and requirements
PSM/RPU/APU ELF files
  • Cortex-R5F processor applications: Bare- metal/RTOS
  • Cortex-A72 processor applications: TF-A/U-Boot/Linux/Bare-metal
  • For loading Cortex-R5F processor applications, ensure that the LPD configuration is completed.
  • For loading Cortex-A72 processor applications, ensure that the FPD configuration is completed.
  • For loading Cortex-R5F/Cortex-A72 using DDR memory, ensure that the PL (NPI with DDR configuration) configuration is completed.
  • For loading Cortex-R5F/Cortex-A72 processor applications to the DDR memory, enable the NoC path from the PMC to the DDR memory in the design.