Controlling the Versal Power Domain Using GPIO - 2023.1 English

Versal Adaptive SoC System Software Developers Guide (UG1304)
Document ID
UG1304
Release Date
2023-05-16
Version
2023.1 English
Versal devices have multiple power domains (see Figure 1) which can be controlled by an external regulator(s). Many regulators support both I2C/PMBus and GPIO output control. The following figure shows the sample connection block diagram. For mored details, refer to the VPK120 Evaluation Board User Guide (UG1568).The PLM will turn off the power domain using GPIO pin when the subsystem is no longer in use.
Figure 1. Sample Connection Block Diagram for Versal Devices

Follow the below steps for build and design to control power domain using GPIO.

  1. Configure GPIO pin(s) in the Vivado Design Suite as output and enable with appropriate drive current strength.
  2. Compile the PLM code with compiler flag VERSAL_ENABLE_DOMAIN_CONTROL_GPIO to enable the GPIO domain control.
  3. PLM requires to be configured to control individual power domain using a CDO command described in the board_topology.cdo file. Create a CDO file with CDO commands to configure power domain control using GPIO. See an example of a board_topology.cdo file below:
    ##### FPD Power Domain Control (LPD GPIO Pin# 15)
#pm_add_node <node_id> <type(2)> <parent GPIO id> <num modes(2)>
#            <word len(3)[8:15] | mode_id:off (0)[0:7]> <gpio register offset[0:15]> <mask[0:31]> <value[0:31]>]
#            <word len(3)[8:15] | mode_id:on  (1)[0:7]> <gpio register offset[0:15]> <mask[0:31]> <value[0:31]>]
  
# <FPD domainctrl nodeid> <type> <gpio-nodeid> <Modes> <len+mode_id> <offset> <mask> <value> <len+mode_id> <offset> <mask> <value>
pm_add_node  0x453404F     0x2    0x18224023    0x02       0x0300     0x0040  0x8000  0x0000     0x0301     0x0040  0x8000 0x8000

    More detailed CDO command for FPD power domain control using LPD GPIO pin 15:

    pm_add_node 0x453404F 0x2 0x18224023 0x02 0x0300 0x0040 0x08000 0x0000 0x0301 0x0040 0x8000 0x8000

    Table 1. Power domain GPIO Control CDO Command
    Parameter Value Details Notes
    Node ID 0x0453404F PM_POWER_FPD_DOMAIN_CTRL Node ID of FPD power domain control
    Type:0x2: GPIO 0x2 GPIO Type of controlling the power domain: GPIO(2)
    Parent GPIO Node ID 0x18224023 PM_DEV_GPIO Node ID of GPIO controller
    Number of power modes 0x02 N/A

    Number of power domain modes: ON(1), OFF(0)

    Below set of rows for each mode...
    Power OFF
    [31:16] Reserved(0)

    [15:8] Number of 32-bit words

    [7:0] Control Mode: ON(1)

    		 0x0301

    [15:8] = 0x03

    [7:0] = 0x01

    		 Number of 32-bits words following for this mode control command

    [31:16] Reserved(0)

    [15:0] Register offset

    		 0x0040 N/A LPD GPIO data_0 register offset
    Pin 15 Bit Mask 0x08000 Mask = 1 << 15 Pin 15 = Bit 15 mask
    Pin 15 Bit Output Value 0x0000 Value = 0 << 15 Pin 15 = Bit 15 OFF(0) Value
    Power ON
    [31:16] Reserved(0)

    [15:8] Number of 32-bit words

    [7:0] Control Mode: ON(1)

    		 0x0301 [15:8] = 0x03

    [7:0] = 0x01

    		 Number of 32-bits words following for this mode control command
    [31:16] Reserved(0)

    [15:0] Register offset

    		 0x0040 N/A LPD GPIO data_0 register offset
    Pin 15 Bit Mask 0x08000 Mask = 1 << 15 Pin 15 = Bit 15 mask
    Pin 15 Bit Output Value 0x08000 Value = 1 << 15 Pin 15 = Bit 15 ON(1) Value
  4. Insert line "file = board_topology.cdo" into <project>.bif from Vivado tool, after pmc_data.cdo file. See an example below.
    new_bif:
{
..........
partition
{
    ..........
   file = pmc_data.cdo
   file = board_topology.cdo
}
.........
}
  5. Recreate BOOT.BIN with this updated BIF using the Bootgen utility.