This lab introduces the basic Dynamic Function eXchange (DFX) flow for UltraScale™ and UltraScale+™ devices. First, you will use a script to individually synthesize the static module and each reconfigurable design module variant. Then in the IDE, you will constrain the location of the reconfigurable modules (RM) using Pblocks and implement the initial configuration of the design. Next, you will implement alternate configurations by locking the static portion of the design, updating the reconfigurable modules with a variant, and re-running implementation. Finally, you will verify that each implemented RM is compatible with the static portion of the design and, if compatible, generate bitstreams.