Revision Controlling Xilinx IP - 2020.2 English

Vivado Design Suite User Guide: Design Flows Overview (UG892)

Document ID
UG892
Release Date
2021-02-12
Version
2020.2 English

The Xilinx IP repository resides in the Vivado install area. For each IP there is a component.xml file that contains the VLNV of the IP and all the user customizable parameters for the IP. The parametrized RTL and associated IP constraints also reside in the IP repository. When you customize an IP, an XCI file is generated that contains the user desired parameters for the IP. When you generate the output products for an IP, the RTL and associated constraints are copied from the IP repository to the project directory and customized using the parameters specified in the XCI file. Thus, for a given version of Vivado, because the IP repo resides in the install area, an XCI file is the only file necessary to recreate the design. In this case, the XCI file should be managed by the revision control system and referenced in the script used to regenerate the design.

Note: Projects created prior to 2020.2, the IP output products are written to the project.srcs directory where the XCI file is residing. In order to facilitate a clear delineation between project sources and output products, for any new projects created using 2020.2, a project.gen directory is automatically created in parallel to the project.srcs directory. All IP output products are written to the project.gen directory.