The Tcl commands and scripting approach vary depending on the design flow used. When
using the Non-Project mode, the source files are loaded using
read_verilog
, read_vhdl
, read_edif,
read_ip
, and read_xdc
commands. The Vivado Design Suite creates an in-memory design database to pass to
synthesis, simulation, and implementation. When using Project mode, you can use the
create_project
, add_files
,
import_files
, and add_directories
commands to
create the project infrastructure needed to manage source files and track design status.
Replace the individual “atomic” commands, synth_design
,
opt_design
, place_design
,
route_design
, and write_bitstream
in the Batch
flow, with an all-inclusive command called launch_runs
. The
launch_runs
command groups the atomic commands together with other
commands to generate default reports and track the run status. The resulting Tcl run
scripts for the Project mode are different from the Non-Project mode. This tutorial
covers the Project mode and Non-Project mode, as well as the Vivado
IDE.
Many of the analysis features discussed in this tutorial are covered in more detail in other tutorials. Not every command or command option is represented here. To view the entire list of Tcl commands provided in the tools, consult the Vivado Design Suite Tcl Command Reference Guide (UG835).
This tutorial contains two labs that can be performed independently.
Lab 1: Using the Non-Project Design Flow
- Walk through a sample run script to implement the bft design.
- View various reports at each step.
- Review the vivado.log file.
- Write design checkpoints.
- Open the Vivado IDE after synthesis to review timing constraint definition and I/O planning and demonstrate methods to update constraints.
- Open the implemented Design Checkpoint to analyze timing, power, utilization and routing.
Lab 2: Using the Project Based Design Flow
- Create a new project.
- Walk through implementing the bft design using the Vivado IDE.
- View various reports at each step.
- Open the synthesized design and review timing constraint definition, I/O planning and design analysis.
- Open the implemented design to analyze timing, power, resource utilization, routing, and cross-probing.