The following table provides the register map of Color space conversion registers in video processing subsystem.
|
Register |
Description |
|---|---|
|
0x000 |
Control signals •bit 0 - ap_start (Read/Write/COH) •bit 1 - ap_done (Read/COR) •bit 2 - ap_idle (Read) •bit 3 - ap_ready (Read) •bit 7 - auto_restart (Read/Write) •others - reserved |
|
0x004 |
Global Interrupt Enable Register •bit 0 - Global Interrupt Enable (Read/Write) •others - reserved |
|
0x008 |
IP Interrupt Enable Register (Read/Write) •bit 0 - Channel 0 (ap_done) •bit 1 - Channel 1 (ap_ready) •others - reserved |
|
0x00c |
IP Interrupt Status Register (Read/TOW) •bit 0 - Channel 0 (ap_done) •bit 1 - Channel 1 (ap_ready) •others - reserved |
|
0x010 |
Input Video Format •bit 7~0 - HwReg_InVideoFormat[7:0] (Read/Write) •others - reserved |
|
0x014 |
Reserved |
|
0x018 |
Output Video Format •bit 7~0 - HwReg_OutVideoFormat[7:0] (Read/Write) •others - reserved |
|
0x01c |
Reserved |
|
0x020 |
Width •bit 15~0 - HwReg_width[15:0] (Read/Write) •others - reserved |
|
0x024 |
Reserved |
|
0x028 |
Height •bit 15~0 - HwReg_height[15:0] (Read/Write) •others - reserved |
|
0x02C |
Reserved |
|
0x030 |
Column Start •bit 15~0 - HwReg_ColStart[15:0] (Read/Write) •others - reserved |
|
0x034 |
Reserved |
|
0x038 |
Column End •bit 15~0 - HwReg_ColEnd[15:0] (Read/Write) •others - reserved |
|
0x03c |
Reserved |
|
0x040 |
Row Start •bit 15~0 - HwReg_RowStart[15:0] (Read/Write) •others - reserved |
|
0x044 |
Reserved |
|
0x048 |
Row End •bit 15~0 - HwReg_RowEnd[15:0] (Read/Write) •others - reserved |
|
0x04c |
Reserved |
|
0x050 |
Coefficient K11 •bit 15~0 - HwReg_K11[15:0] (Read/Write) •others - reserved |
|
0x054 |
Reserved |
|
0x058 |
Coefficient K12 •bit 15~0 - HwReg_K12[15:0] (Read/Write) •others - reserved |
|
0x05c |
Reserved |
|
0x060 |
Coefficient K13 •bit 15~0 - HwReg_K13[15:0] (Read/Write) •others - reserved |
|
0x064 |
Reserved |
|
0x068 |
Coefficient K21 •bit 15~0 - HwReg_K21[15:0] (Read/Write) •others - reserved |
|
0x06c |
Reserved |
|
0x070 |
Coefficient K22 •bit 15~0 - HwReg_K22[15:0] (Read/Write) •others - reserved |
|
0x074 |
Reserved |
|
0x078 |
Coefficient K23 •bit 15~0 - HwReg_K23[15:0] (Read/Write) •others - reserved |
|
0x07c |
Reserved |
|
0x080 |
Coefficient K31 •bit 15~0 - HwReg_K31[15:0] (Read/Write) •others - reserved |
|
0x084 |
Reserved |
|
0x088 |
Coefficient K32 •bit 15~0 - HwReg_K32[15:0] (Read/Write) •others - reserved |
|
0x08c |
Reserved |
|
0x090 |
Coefficient K33 •bit 15~0 - HwReg_K33[15:0] (Read/Write) •others - reserved |
|
0x094 |
Reserved |
|
0x098 |
Coefficient R Offset •bit 11~0 - HwReg_ROffset_V[11:0] (Read/Write) •others - reserved |
|
0x09c |
Reserved |
|
0x0a0 |
Coefficient G Offset •bit 11~0 - HwReg_GOffset_V[11:0] (Read/Write) •others - reserved |
|
0x0a4 |
Reserved |
|
0x0a8 |
Coefficient B Offset •bit 11~0 - HwReg_BOffset_V[11:0] (Read/Write) •others - reserved |
|
0x0ac |
Reserved |
|
0x0b0 |
Clamp Minimum •bit 9~0 - HwReg_ClampMin_V[9:0] (Read/Write) •others - reserved |
|
0x0b4 |
Reserved |
|
0x0b8 |
Clamp Maximum •bit 9~0 - HwReg_ClipMax_V[9:0] (Read/Write) •others - reserved |
|
0x0bc |
Reserved |
|
0x0c0 |
Coefficient K11_2 •bit 15~0 - HwReg_K11_2[15:0] (Read/Write) •others - reserved |
|
0x0c4 |
Reserved |
|
0x0c8 |
Coefficient K12_2 •bit 15~0 - HwReg_K12_2[15:0] (Read/Write) •others - reserved |
|
0x0cc |
Reserved |
|
0x0d0 |
Coefficient K13_2 •bit 15~0 - HwReg_K13_2[15:0] (Read/Write) •others - reserved |
|
0x0d4 |
Reserved |
|
0x0d8 |
Coefficient K21_2 •bit 15~0 - HwReg_K21_2[15:0] (Read/Write) •others - reserved |
|
0x0dc |
Reserved |
|
0x0e0 |
Coefficient K22_2 •bit 15~0 - HwReg_K22_2[15:0] (Read/Write) •others - reserved |
|
0x0e4 |
Reserved |
|
0x0e8 |
Coefficient K23_2 •bit 15~0 - HwReg_K23_2[15:0] (Read/Write) •others - reserved |
|
0x0ec |
Reserved |
|
0x0f0 |
Coefficient K31_2 •bit 15~0 - HwReg_K31_2[15:0] (Read/Write) •others - reserved |
|
0x0f4 |
Reserved |
|
0x0f8 |
Coefficient K32_2 •bit 15~0 - HwReg_K32_2[15:0] (Read/Write) •others - reserved |
|
0x0fc |
Reserved |
|
0x100 |
Coefficient K33_2 •bit 15~0 - HwReg_K33_2[15:0] (Read/Write) •others - reserved |
|
0x104 |
Reserved |
|
0x108 |
R Offset 2 •bit 11~0 - HwReg_ROffset_2_V[11:0] (Read/Write) •others - reserved |
|
0x10c |
Reserved |
|
0x110 |
G Offset 2 •bit 11~0 - HwReg_GOffset_2_V[11:0] (Read/Write) •others - reserved |
|
0x114 |
Reserved |
|
0x118 |
B Offset 2 •bit 11~0 - HwReg_BOffset_2_V[11:0] (Read/Write) •others - reserved |
|
0x11c |
Reserved |
|
0x120 |
Clamp Minimum 2 •bit 9~0 - HwReg_ClampMin_2_V[9:0] (Read/Write) •others - reserved |
|
0x124 |
Reserved |
|
0x128 |
Clip Maximum 2 •bit 9~0 - HwReg_ClipMax_2_V[9:0] (Read/Write) •others - reserved |
|
0x12c |
Reserved |