LDPC Decoding/Encoding - 2.0 English

LDPC Encoder/Decoder (PB052)

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2.0 English
  • Highly configurable codes
    • A range of quasi-cyclic codes can be configured over an AXI4-Lite interface
    • Code parameter memory can be shared across up to 128 codes
    • Codes can be selected on a block-by-block basis
    • 5G support mode where tables are pre-loaded
  • Normalized min-sum or offset min-sum decoding algorithm
    • Normalization factor programmable (from 0.0625 to 1 in steps of 0.0625) for layers
    • Offset factor can be specified per block (from 0.25 to 3.75 in steps of 0.25)
  • Number of iterations between 1 and 63
    • Specified for each block using the AXI4-Stream control interface
  • Early termination
    • Specified for each block to be none, one, or both of the following:
      • Parity check passes
      • No change in hard information or parity bits since last iteration
  • When configured as a decoder, soft or hard outputs
    • Specified for each block to include information and optional parity
    • 6-bit soft log-likelihood ratio (LLR) input (8-bit interface, two fractional bits, with external saturation before input to symmetric range -7.75 to +7.75 assumed) and 8-bit output
  • In- or out-of-order execution of blocks, with user specified ID field to identify blocks
  • Encoder and decoder variants, with optional support for improved throughput when sub-matrix size is small
  • Optional final parity check to update parity pass/fail for final output
  • Optional initialization of codes from device configuration, avoiding download using AXI4-Lite interface