Using Encryption and Authentication to Secure an UltraScale/UltraScale+ FPGA Bitstream (XAPP1267)

Document ID: XAPP1267
Release Date: 2024-06-24
Revision: 1.7 English

Summary
Introduction
Advanced Encryption Standard and Authentication
Bitstream Authentication
RSA Authentication
Key Rolling
Encrypted Bitstream Implementation Overview
Hardware Board Requirements
Software Requirements
AES Key Storage
BBRAM Storage Location
eFUSE Storage Location
Obfuscated Keys
eFUSE Registers
eFUSE Control Register (FUSE_CNTL) Bit Description
eFUSE Security Register (FUSE_SEC) Description
Creating an Encryption Key and Encrypted Bitstream
Loading the Encryption Key
BBRAM
eFUSE
Loading the Encrypted Bitstream
eFUSE Programming General Recommendations
Hardware Verification
Conclusion
Finding Additional Documentation
References
Revision History
Please Read: Important Legal Notices

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