The power consumption of the AMD Zynq™ UltraScale+™ RFSoC XCZU48DR-2FSVG1517E device must be limited to a 40 A maximum current draw on the combined VCCINT and SD-FEC rails. This limitation is rooted in the 0.85 V POL powering these rails. It is expected that the 5G workload running on the Zynq UltraScale+ RFSoC can be accommodated well within this power limit.
The Xilinx Power
Estimator (XPE) tool
must be used to ensure that this 40 A maximum current limit for the combined VCCINT and SD-FEC rails is observed at the maximum operating
junction temperature of 100°C. The card protection circuit initiates a fatal shutdown if
the VCCINT and SD-FEC power consumption continues to exceed
this threshold after the RF_CPU_RST
signal has been
asserted.
The T2 card is powered from the PCIe bus, with the following maximum current levels expected from each rail:
- 12 V at 4.5 A
- 3.3 V at 2.5 A
The total T2 maximum power consumption is expected to be approximately 62 W.