Syntax
- For Zynq
devices and Zynq UltraScale+ MPSoC:
[trustzone = <options> ] <filename>
- For AMD Versal™
adaptive
SoC:
{ trustzone = <options>, file = <filename> }
Description
Configures the core to be TrustZone secure or non-secure. Options are:
- secure
- nonsecure (default)
Example
- For Zynq
devices and Zynq UltraScale+ MPSoC:
all: { [bootloader, destination_cpu=a53-0] fsbl.elf [exception_level=el-3, trustzone = secure] bl31.elf }
- For AMD Versal™
adaptive
SoC:
new_bif: { image { { type = bootimage, file = base.pdi } } image { name = apu_ss, id = 0x1c000000 { load = 0x1000, file = system.dtb } { exception_level = el-2, file = u-boot.elf } { core = a72-0, exception_level = el-3, trustzone, file = bl31.elf } } }
Note:
*base.pdi
is the PDI generated by Vivado.