| Name | I/O | Clock Domain | Description |
|---|---|---|---|
| gttxpippmen_in | I | TXUSRCLK2 | Width: 1* Num. channels. Available when TXPI_Port_EN user parameter is enabled. Connects to TXPIPPMEN on transceiver channel primitives. |
| gttxpippmovrden_in | I | TXUSRCLK2 | Width: 1* Num. channels. Available when TXPI_Port_EN user parameter is enabled. Connects to TXPIPPMOVRDEN on transceiver channel primitives. |
| gttxpippmpd_in | I | TXUSRCLK2 | Width: 1* Num. channels. Available when TXPI_Port_EN user parameter is enabled. Connects to TXPIPPMPD on transceiver channel primitives. |
| gttxpippmsel_in | I | TXUSRCLK2 | Width: 1* Num. channels. Available when TXPI_Port_EN user parameter is enabled. Connects to TXPIPPMSEL on transceiver channel primitives. |
| gttxpippmstepsize_in | I | TXUSRCLK2 | Width: 5* Num. channels. Available when TXPI_Port_EN user parameter is enabled. Connects to TXPIPPMSTEPSIZE on transceiver channel primitives. |
| phy_rxp_in[n-1:0] 1 | I | RX Serial Clock | Positive differential serial input to the transceiver |
| phy_rxn_in[n-1:0] 1 | I | RX Serial Clock | Negative differential serial input to the transceiver |
| phy_txp_out[n-1:0] 2 | O | TX Serial Clock | Positive differential serial output from the transceiver |
| phy_txn_out[n-1:0] 2 | O | TX Serial Clock | Negative differential serial output from the transceiver |
| vid_phy_tx_axi4s_ch<i>_tready 3 | O | TXUSRCLK2 |
AXI4-Stream based tready indicator |
| vid_phy_tx_axi4s_ch<i>_tvalid 3 | I | TXUSRCLK2 |
AXI4-Stream based tvalid indicator |
| vid_phy_tx_axi4s_ch<i>_tdata 3 | I | TXUSRCLK2 |
AXI4-Stream based tdata
bus GT Mapping: TXDATA_IN Width: TX_DATA_WIDTH |
| vid_phy_tx_axi4s_ch<i>_tuser 3 | I | TXUSRCLK2 |
Width: 1 bit (unused) |
| vid_phy_rx_axi4s_ch<i>_tready 3 | I | RXUSRCLK2 | AXI4-Stream based tready indicator |
| vid_phy_rx_axi4s_ch<i>_tvalid 3 | O | RXUSRCLK2 | AXI4-Stream based tvalid indicator. |
| vid_phy_rx_axi4s_ch<i>_tdata 3 | O | RXUSRCLK2 |
AXI4-Stream based tdata
bus GT Mapping: RXDATAOUT Width: RX_DATA_WIDTH |
| vid_phy_rx_axi4s_ch<i>_tuser 3 | O | RXUSRCLK2 |
Width: 1 bit (unused) |
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