The Vitis™ Unified Software Development Environment provides a variety of software packages, including device drivers, libraries, and board support packages to help you develop a software platform in the baremetal and RTOS based environment. This document describes these software packages in details including API description. The Vitis Unified Software Development Environment also provides the FreeRTOS kernel along with the low level software needed for the kernel to work on a supported processors like AMD MicroBlaze™ , Cortex® A9, Cortex-R5F, Cortex-A53, and Cortex-A72). The documentation is listed in the following table; click the name to open the document.
| Library Name | Summary |
|---|---|
| Xilinx Standard C Libraries | Describes the software libraries available for the embedded processors. |
| Standalone Library v9.0 | Describes the Standalone platform, a single-threaded, and a simple
operating system (OS) platform that provides the lowest layer of
software modules to access the processor-specific
functions. Standalone platform functions include setting up the interrupts and exceptions systems, configuring caches, and other hardware specific functions.The Hardware Abstraction Layer (HAL) is described in this document. |
| LwIP 2.1.3 Library v1.1 | Describes the port of the third party networking library, Light Weight IP (lwIP) for embedded processors. |
| XilFlash Library v4.10 | Provides read/write/erase/lock/unlock features to access a parallel flash device. |
| XilFFS Library v5.0 | XilFFS is a generic FAT file system that is primarily added for use with SD/eMMC driver. The file system is open source and a glue layer is implemented to link it to the SD/eMMC driver. |
| XilSecure Library v5.2 | Provides APIs to access secure hardware on the AMD Zynq™ UltraScale+™ MPSoC. |
| XilSkey Library v7.5 | Provides a programming mechanism for user-defined eFUSE bits and for
programming the KEY into battery-backed RAM (BBRAM) of AMD Zynq™ 7000,
provides programming mechanisms for eFUSE bits of UltraScale+ devices. The library also provides programming mechanisms for eFUSE bits and BBRAM key of the Zynq UltraScale+ MPSoC. |
| XilPM Library v5.1 | The Zynq UltraScale+ MPSoC and AMD Versal™ adaptive
SoC power management framework is a set of power management options,
based upon an implementation of the extensible energy management
interface (EEMI). The power management framework allows software components running across different processing units (PUs) on a chip or device to issue or respond to requests for power management. |
| XilFPGA Library v6.5 | Provides an interface to the Linux or bare-metal users for configuring the programmable logic (PL) over PCAP from PS. The library is designed for Zynq UltraScale+ MPSoC and Versal adaptive SoC to run on top of standalone BSPs. |
| XilMailbox Library v1.8 | Provides the top-level hooks for sending or receiving an inter-processor interrupt (IPI) message using the Zynq UltraScale+ MPSoC and Versal adaptive SoC IP integrator hardware. |
| XilSEM Library v1.8 | The Xilinx Error Mitigation (XilSEM) library is a pre-configured, pre-verified solution to detect and optionally correct soft errors in Configuration Memory of Versal adaptive SoCs. |
| XilTimer Library v1.3 | Provides sleep and interval timer functionality, Hardware and Software features that are differentiated using a layered approach. |