DFE-CFR Primitive - 7.0 English

Peak Cancellation Crest Factor Reduction LogiCORE IP Product Brief (PB008)
Document ID
PB008
Release Date
2021-10-22
Version
7.0 English

For Zynq UltraScale+ RFSoC DFE when leveraging DFE-CFR Primitive, the selectable configurations are as follows:

• Support for clock-to-sample ratio of 1.

• PC-CFR stages with Smart Peak Processing enabled.

• Support for 1, 2, 4, and 8 antennas.

• Post Processing stage fixed to WCFR.