In this step, you place and route the design and prepare the static portion of the design for reuse with new Reconfigurable Modules.
Implementing the Design
- Optimize, place, and route the design by issuing the following
commands:
opt_design place_design route_design
After both
place_design
androute_design
, examine the state of the design in the Device view (see the following figure). One thing to note afterplace_design
is the introduction of Partition Pins. These are the physical interface points between static and reconfigurable logic. They are anchor points within an interconnect tile through which each I/O of the Reconfigurable Module must route. They appear as white boxes in the placed design view. Forpblock_shift
, they appear in the top of that Pblock, as the connections to static are just outside the Pblock in that area of the device. ForPblock_count
, they appear outside the user-defined region, asSNAPPING_MODE
vertically collected more frames to be added to the Reconfigurable Partition.Figure 1. Partition Pins within Placed Design - To find these partition pins in the GUI easily:
- Select the Reconfigurable Module (for example,
inst_shift
) in the Netlist pane. - Select the Cell Pins tab in the Cell Properties pane.
- Select the Reconfigurable Module (for example,
- Select any pin to highlight it, or use Ctrl+A to select all. The
Tcl equivalent of the latter is:
select_objects [get_pins inst_shift/*]
- Use the Routing Resources toolbar button to toggle between abstracted and actual routing information, and to change the visibility of the routing resources themselves. All nets in the design are fully routed at this point.
Saving the Results
- Save the full design checkpoint and create report files by
issuing these
commands:
write_checkpoint -force Implement/Config_shift_right_count_up_implement/top_route_design.dcp report_utilization -file Implement/Config_shift_right_count_up_implement/top_utilization.rpt report_timing_summary -file Implement/Config_shift_right_count_up_implement/top_timing_summary.rpt
- [Optional] Save checkpoints for each of the Reconfigurable
Modules by issuing these two
commands:
write_checkpoint -force -cell inst_shift Checkpoint/shift_right_route_design.dcp write_checkpoint -force -cell inst_count Checkpoint/count_up_route_design.dcp
Tip: When runningrun_dfx.tcl
to process the entire design in batch mode, design checkpoints, log files, and report files are created at each step of the flow.At this point, you have created a fully implemented Dynamic Function eXchange design from which you can generate full and partial bitstreams. The static portion of this configuration is used for all subsequent configurations. To isolate the static design, remove the current Reconfigurable Modules. Make sure routing resources are enabled, and zoom in to an interconnect tile with partition pins.
- Clear out Reconfigurable Module logic by issuing the following
commands:
update_design -cell inst_shift -black_box update_design -cell inst_count -black_box
Issuing these commands results in many design changes as shown in the following figure:
- The number of Fully Routed nets (green) decreased.
-
inst_shift
andinst_count
now appear in the Netlist view as empty.
Figure 3. The inst_shift Module Before update_design -black_box
- Issue the following command to lock down all placement and
routing:
lock_design -level routing
Because no cell was identified in the
lock_design
command, the entire design in memory (currently consisting of the static design with black boxes) is affected. All routed nets now display as locked, as indicated by dashed lines in Figure 18. All placed components changed from blue to orange to show they are also locked. - Issue the following command to write out the remaining
static-only
checkpoint:
write_checkpoint -force Checkpoint/static_route_design.dcp
This static-only checkpoint is used for future configurations.
- Close this design before moving on to the next configuration:
close_project