Vivado Simulator Elaboration Options - 2020.2 English

Vivado Design Suite User Guide: Logic Simulation (UG900)

Document ID
UG900
Release Date
2020-11-23
Version
2020.2 English
Table 1. Vivado Simulator Elaboration Options
Option Description
xsim.elaborate.snapshot Specifies the simulation snapshot name
xsim.elaborate.debug_level Choose simulation debug visibility level. By default it is "typical"
xsim.elaborate.relax Relax strict HDL Language checking rules
xsim.elaborate.mt_level Specify number of sub-compilation jobs to run in parallel
xsim.elaborate.load_glbl Load GLBL module
xsim.elaborate.rangecheck Enables run time value range check for VHDL
xsim.elaborate.sdf_delay Specifies sdf timing delay type to be read for use in timing simulation
xsim.elaborate.xelab.more_option More XELAB elaboration options
xsim.elaborate.xsc.more_option More options for XSC during elaboration