Hardware Debug - 2.3 English

Semi-Ternary CAM Search LogiCORE IP Product Guide (PG319)

Document ID
PG319
Release Date
2022-05-25
Version
2.3 English

Hardware issues can range from link bring-up to problems seen after hours of testing. This section provides debug steps for common issues. The Vivado® debug feature is a valuable resource to use in hardware debug. The signal names mentioned in the following individual sections can be probed using the debug feature for debugging the specific problems.

Table 1. Debug Status Port
Port Name Description Clock Domain

[SINGLE_CLOCK / DUAL_CLOCK]

debug_status[0] Address decoding failed for write operation (unknown address – possibly caused by mismatch between software and hardware configuration parameters) key_clk / ram_clk
debug_status[1] Address decoding failed for read operation (unknown address – possibly caused by mismatch between software and hardware configuration parameters) key_clk / ram_clk
debug_status[2] AXI read data FIFO overflow (read data is not accepted fast enough) key_clk / ram_clk
debug_status[3] AXI write response FIFO overflow (write response channel not responding fast enough) s_axi_clk
debug_status[4] AXI read/write request FIFO overflow. Read/write operations are not executed fast enough. Possible problems:
  1. key_clk/ram_clk frequency is too low compared to s_axi_clk frequency.
  2. Not enough idle cycles on the Lookup Request interface (AXI read/write operatons are only executed during idle lookup cycles).

s_axi_clk

debug_status[5] Lookup Request FIFO overflow (ram_clk frequency is too low compared to key_clk frequency, or actual lookup rate is higher than the configured lookup rate) key_clk
debug_status[6] Lookup Response FIFO overflow (ram_clk frequency is too high compared to key_clk frequency) key_clk / ram_clk
debug_status[7] Unused  
debug_status[8] Write Busy: An insert/update/delete operation is ongoing. key_clk
debug_status[9] Lookup Busy: A lookup operation is ongoing. key_clk
debug_status[31:10] Unused