Virtex-6 BRAM/FIFO Timing Issue (Quality Alert)(XCN11026) - The ISE 11.x, 12.x and 13.1 TRCE/Timing Analyzer tools do not correctly analyze certain control signals and address lines of the Virtex -6 36Kb BRAM (RAMB36E1), 18Kb BRAM (RAMB18E1), and 18Kb FIFO (FIFO18E1) when used in SDP, TDP, or ECC modes, potentially resulting in unreported setup and hold time violations. The unreported violations can result in read and write errors in silicon and are not reported in the unconstrained path report section of the timing report.