Virtex-5 FPGA Integrated Endpoint Block for PCI Express Designs: DDR2 SDRAM DMA Initiator Demonstration Platform Application Note (XAPP859) - Provides an interface between the PCI Express Endpoint block in the Virtex-5 FPGA and a single rank, 64-bit, 256 MB DDR2 SDRAM memory. - XAPP859
xapp859.pdf
- Document ID
- XAPP859
- Release Date
- 2008-07-31
- Revision
- 1.1 English