LVDS Source Synchronous 7:1 Serialization and Deserialization Using Clock Multiplication Application Note (XAPP585) - Describes how to use ISERDES and OSERDES efficiently in conjunction with the mixed-mode clock manager (MMCM) or phase-locked loop (PLL) for reception and transmission of 7:1 data using low-voltage differential signaling (LVDS) data transmission at speeds from 415 Mb/s to 1,200 Mb/s per line.