Serial LVDS High-Speed ADC Interface Application Note (XAPP524) - This application note describes how to use the dedicated SelectIO technology deserializer (ISERDESE2) components in 7 series FPGAs to interface with analog-to-digital converters (ADC) with serial low-voltage differential signalling (LVDS) outputs. - XAPP524
xapp524-serial-lvds-adc-interface.pdf
- Document ID
- XAPP524
- Release Date
- 2012-11-20
- Revision
- 1.1 English