FPGA Acceleration of Matrix Multiplication for Neural Networks (XAPP1332) - Describes the implementation and evaluation of a large multiply-add systolic array designed for the acceleration of matrix multiplication for deep learning neural network inference applications. - XAPP1332
xapp1332-neural-networks.pdf
- Document ID
- XAPP1332
- Release Date
- 2020-02-27
- Revision
- 1.0 English