UltraScale FPGA Post-Configuration Access of Parallel NOR Flash Memory Using STARTUPE3 Application Note (XAPP1282) - Describes a Virtex UltraScale FPGA reference design using the STARTUPE3 primitive to implement post-configuration read and write access through a dedicated BPI interface to the VCU108 on-board parallel NOR flash memory. - XAPP1282
xapp1282-us-post-cnfg-nor-axi-emp-ip.pdf
- Document ID
- XAPP1282
- Release Date
- 2022-02-08
- Revision
- 1.1 English