Reed-Solomon Erasure Codec Design Using Vivado High-Level Synthesis Application Note (XAPP1273) - Focuses on the design of an erasure codec using the Xilinx Vivado High-Level Synthesis (HLS) tool, which takes the source code in C programming language and generates highly efficient synthesizable Verilog or VHDL code for a Kintex UltraScale FPGA. - XAPP1273
xapp1273-reed-solomon-erasure.pdf
- Document ID
- XAPP1273
- Release Date
- 2016-03-14
- Revision
- 1.0 English