Bitstream Identification with USR_ACCESS using the Vivado Design Suite Application Note (XAPP1232) - Describes a solution for bitstream identification that is accessible to the FPGA user design. Instructions are provided for Vivado Design Suite write_bitstream and for access to the identification information using Vivado tools. - XAPP1232

Document ID

XAPP1232

Release Date

2016-03-03

Revision

1.0 English