Zero Latency Multiplexing I/O for ASIC Emulation Application Note (XAPP1217) - Provides a method for FPGA emulation platforms to communicate multiple signals over one I/O or I/O differential pair to another FPGA. - XAPP1217

xapp1217-zero-latency-mux.pdf

Document ID
XAPP1217
Release Date
2015-03-17
Revision
1.0 English