Using Execute-in-Place (XIP) with AXI Quad SPI in Vivado IP Integrator Application Note(XAPP1176) - This application note describes the eXecute-in-place (XIP) feature introduced in the AXI Quad SPI v3.0 IP core, released in the Vivado Design Suite v2013.1. It provides information about the required connections to configure the FPGA from an SPI serial flash device, as well as the configuration flow for the SPI mode. Flowcharts are provided to show the data flow. It is designed for use with the Kintex-7 (KC705) board with Numonyx SPI flash memory, but modifications in the software example file can be implemented for use on any Xilinx board.