Integrating a Video Frame Buffer Controller (VFBC) in System Generator Application Note(XAPP1136) - Provides basic knowledge on how to integrate an embedded processor system with the Xilinx Multi-Port Memory Controller (MPMC) and Video Frame Buffer Controller (VFBC) IP cores in System Generator for DSP (System Generator). - XAPP1136
xapp1136.pdf
- Document ID
- XAPP1136
- Release Date
- 2009-06-01
- Revision
- 1.0 English