Source-Synchronous Serialization and Deserialization (up to 1050 Mb/s)(XAPP1064) - This application note discusses how to efficiently use the Spartan-6 FPGA ISERDES and OSERDES primitives in conjunction with the input delay blocks and phase-detector circuitry. - XAPP1064

Document ID

XAPP1064

Release Date

2013-11-19

Revision

1.2 English