Integrated SD-FEC in Zynq UltraScale+ RFSoCs for Higher Throughput and Power Efficiency (WP498) - By introducing the industry's first integrated and configurable soft-decision forward error correction (SD-FEC) IP block with Xilinx's All Programmable devices, Xilinx enables more efficient, higher throughput, lower power LDPC and Turbo codec solutions for a wide range of data communications applications. - WP498
wp498-sdfec.pdf
- Document ID
- WP498
- Release Date
- 2018-05-29
- Revision
- 1.1 English