The Xilinx Isolation Design Flow for Fault-Tolerant Systems (WP412) - The ability to control system failure modes through fault-tolerant design requires an implementation methodology that ensures fault propagation can be controlled. Xilinx Isolation Design Flow (IDF) provides fault containment at the FPGA module level, enabling single-chip fault tolerance by various techniques. - WP412
wp412_IDF_for_Fault_Tolerant_Sys.pdf
- Document_ID
- WP412
- Release_Date
- 2013-10-16
- Revision
- 1.1 English