High-Level Implementation of Bit- and Cycle-Accurate Floating-Point DSP Algorithms with Xilinx FPGAs (WP409) - Floating-point arithmetic, long the realm of general-purpose CPUs, DSPs, and graphics processing units (GPUs) is seeing growing use in FPGAs. Xilinx System Generator for DSP meets this demand by supporting the design and implementation of floating-point algorithms from within the MathWorks Simulink modeling environment. - WP409

wp409_Floating_Point_DSP_Algorithms.pdf

Document ID
WP409
Release Date
2011-10-31
Revision
1.0 English