Hierarchical Design Using Synopsys and Xilinx FPGAs (WP386) - Xilinx FPGAs offer up to two million logic cells currently, and they continue to expand. Hierarchical design is becoming more popular with designs of this complexity because it allows users to preserve completed portions of the design, deliver complex IP place-and-route results, and develop multiple blocks in parallel. These methods can lead to fewer design runs, reduced verification time, and more consistent timing closure, resulting in reduced time to market. - WP386
wp386_Hierarchical_Design_Synopsys_Xilinx.pdf
- Document ID
- WP386
- Release Date
- 2011-02-14
- Revision
- 1.0 English