Reducing Switching Power with Intelligent Clock Gating (WP370) - Xilinx delivers the first automated, fine-grain clock-gating solution that can reduce dynamic power by up to 30% for Virtex-6, Spartan-6, Kintex-7 and Virtex-7 FPGA designs. - WP370
wp370_Intelligent_Clock_Gating.pdf
- Document ID
- WP370
- Release Date
- 2013-08-29
- Revision
- 1.4 English