Memory Interfaces Made Easy with Xilinx FPGAs and the Memory Interface Generator (WP260) - This white paper discusses the various memory interface controller design challenges and Xilinx solutions, including how to use the Xilinx software tools and hardware-verified reference designs to build a complete memory interface solution for your own application, from low-cost DDR SDRAM applications to higher-performance interfaces like the 667Mb/s DDR2 SDRAMs. - WP260
wp260.pdf
- Document ID
- WP260
- Release Date
- 2007-02-15
- Revision
- 1.0 English