High-Speed Transceiver Logic - Obsolete (WP156) - HSTL is a technology-independent interface standard for digital integrated circuits. It is a JEDEC standard developed for voltage scalable and technology independent I/O structures. The I/O structures required by this standard are differential amplifier inputs (with one input internally tied to a user-supplied input reference voltage, VREF for single-ended inputs) and outputs using output power supply inputs (VCCO) that may differ from those operating the device itself. This document is obsolete/under obsolescence. - WP156
wp156.pdf
- Document ID
- WP156
- Release Date
- 2002-01-01
- Revision
- 1.0 English