Image Processing Pipeline v1.0 Data Sheet (DS723) - 1.0 English - The Xilinx LogiCORE IP Image Processing Pipeline core provides an optimized hardware block to pre-process images captured by a color image sensor fitted with a Bayer Color Filter Array (CFA). The Image Processing Pipeline core provides an efficient and lowfootprint solution to correct defective pixels, interpolate the missing color components for every pixel, correct colors to adjust to lighting conditions, and set gamma to compensate for the intensity distortion of different display devices. - DS723
v_ipipe_ds723.pdf
- Document ID
- DS723
- Release Date
- 2009-04-24
- Version
- 1.0 English