VC7203 IBERT Getting Started Guide (ISE Design Suite 14.3 to 14.4)(UG846) - Getting started guide for setting up the VC7203 Virtex-7 FPGA GTX Transceiver Characterization Board to run the Integrated Bit Error Ratio Test (IBERT) demonstration. - UG846
ug846-vc7203-ibert-gsg-ise.pdf
- Document ID
- UG846
- Release Date
- 2012-11-07
- Revision
- 1.0 English