JESD204 v7.2 Product Guide (PG066) - 7.2 English - This core implements a JESD204B interface supporting a line rate of up to 12.5 Gb/s on 1- 12 lanes using GTX or GTH transceivers in Zynq-7000 AP SoC devices, Kintex-7, and Virtex-7 FPGAs. Can be configured as tx or rx. Supports sharing GTX/ GTH transceiver between a transmitter and receiver. - PG066

Document ID

PG066

Release Date

2017-10-04

Version

7.2 English