LogiCORE IP Endpoint PIPE v1.8 for PCI Express Data Sheet (DS321) - 2.0 English - The LogiCORE IP Endpoint PIPE (PHY Interface) for PCI Express 1-lane core is a high-bandwidth scalable and reliable serial interconnect intellectual property building block for use with the Spartan-3, Spartan-3E, and Spartan-3A FPGAs in conjunction with an external PHY device. - DS321
pcie_pipe_ds321.pdf
- Document ID
- DS321
- Release Date
- 2010-07-23
- Version
- 2.0 English