50G IEEE 802.3 Reed-Solomon Forward Error Correction v2.0 Product Brief (PB039) - 2.0 English - The Xilinx® LogiCORE™ 50G IEEE 802.3 RS-FEC IP core implements the Reed-Solomon Forward Error Correction (RS-FEC) sublayer as described in the 25/50G Ethernet Consortium Schedule 3 (v1.6) section 3.2.3 in RS(528,514) KR4 mode), or the IEEE 802.3cd in RS(544,514) KP4 mode. - PB039
pb039-ieee802d3-50g-rs-fec.pdf
- Document ID
- PB039
- Release Date
- 2019-05-22
- Version
- 2.0 English