MPEG-4 Simple Profile Decoder v1.3 Data Sheet (DS338) - 1.7 English - MPEG-4 Part 2 Simple Profile Decoder core is a fully functional VHDL design implemented on a Xilinx FPGA. The MPEG-4 Decoder core accepts compressed video information and recreates a video image suitable for display. - DS338
mpeg_4_decoder_ds338.pdf
- Document ID
- DS338
- Release Date
- 2008-04-14
- Version
- 1.7 English