ChipScope Integrated Bit Error Ratio Test (IBERT) for 7 Series GTP(DS874) - 2.00a English - The customizable LogiCORE IP ChipScope Pro Integrated Bit Error Ratio Test (IBERT) core for 7 series FPGA GTP transceivers is designed for evaluating and monitoring the GTP transceivers. - DS874

Document ID

DS874

Release Date

2012-07-25

Version

2.00a English