LogiCORE IP JESD204 (v2.1) Data Sheet (AXI)(DS814) - 2.1 English - The Xilinx LogiCORE IP JESD204 core implements a JESD204A or JESD204B interface supporting a line rate of up to 6.25 Gb/s on 1, 2 or 4 lanes using GTX transceivers in Virtex-6 and a line rate of up to 10.3125 Gb/s on 1, 2, 4 or 8 lanes using GTX transceivers in Kintex-7 and Virtex-7 FPGAs. The JESD204 core can be configured as Transmit or Receive. The core supports sharing a GTX transceiver between a transmitter and receiver. This document contains information about the AXI4 version of the core.